Processor Configuration Registers
2.7.3
PVCCTL—Port VC Control Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/MMR
10C–10Dh
0000h
RW, RO
Size:
16 bits
BIOS Optimal Default
000h
Reset
Value
RST/
PWR
Bit
Access
Description
15:4
RO
0h
Reserved (RSVD)
VC Arbitration Select (VCAS)
This field will be programmed by software to the only possible
value as indicated in the VC Arbitration Capability field. Since
there is no other VC supported than the default, this field is
reserved.
3:1
0
RW
RO
000b
Uncore
Uncore
Reserved for Load VC Arbitration Table (VCARB)
Used for software to update the VC Arbitration Table when VC
arbitration uses the VC Arbitration Table. As a VC Arbitration
Table is never used by this component this field will never be
used.
0b
134
Datasheet, Volume 2
INTEL [ INTEL ]
