4-2
5-1
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
Pin List, Sorted by land Number .......................................................................... 85
Signal Definitions ............................................................................................ 105
Processor Thermal Specifications....................................................................... 112
130W TDP Processor Thermal Profile Table ......................................................... 113
105W TDP Processor Thermal Profile Table ......................................................... 115
95W TDP Processor Thermal Profile Table ........................................................... 116
Summary of Processor-specific PECI Commands.................................................. 122
GetTemp() Response Definition......................................................................... 126
PCIConfigRd() Response Definition .................................................................... 127
PCIConfigWr() Response Definition .................................................................... 129
Mailbox Command Summary ............................................................................ 129
6-10 Counter Definition ........................................................................................... 131
6-11 ACPI T-state Duty Cycle Definition..................................................................... 132
6-12 MbxSend() Response Definition......................................................................... 135
6-13 MbxGet() Response Definition........................................................................... 136
6-14 Domain ID Definition ....................................................................................... 138
6-15 Multi-Domain Command Code Reference ............................................................ 138
6-16 Completion Code Pass/Fail Mask........................................................................ 139
6-17 Device Specific Completion Code (CC) Definition.................................................. 139
6-18 Originator Response Guidelines......................................................................... 140
6-19 Error Codes and Descriptions ............................................................................ 141
6-20 PECI Client Response During Power-Up (During ‘Data Not Ready’) ......................... 141
6-21 Power Impact of PECI Commands vs. C-states .................................................... 143
6-22 PECI Client Response During S1........................................................................ 143
7-1
7-2
7-3
7-4
7-5
Processor C-State Power Specifications .............................................................. 146
Read Byte SMBus Packet.................................................................................. 149
Write Byte SMBus Packet ................................................................................. 149
Memory Device SMBus Addressing..................................................................... 150
128-Byte ROM Checksum Values....................................................................... 172
Datasheet Volume 1 of 2
7
INTEL [ INTEL ]
