Introduction
• Integrated Heat Spreader (IHS) — A component of the processor package used
to enhance the thermal performance of the package. Component thermal solutions
interface with the processor at the IHS surface.
• Intel® QuickPath Interconnect (Intel® QPI) — Intel QuickPath Interconnect is
a cache-coherent, links-based interconnect specification for Intel® processor,
chipset, and I/O bridge components.
• Jitter — Any timing variation of a transition edge or edges from the defined UI.
• MP — Multi-processor system consisting of more than two processors.
• OEM — Original Equipment Manufacturer.
• Processor Information ROM (PIROM) — A memory device located on the
processor and accessible via the System Management Bus (SMBus) which contains
information regarding the processor’s features. This device is shared with the
Scratch EEPROM, is programmed during manufacturing, and is write-protected.
— Scratch EEPROM (Electrically Erasable, Programmable Read-Only
Memory) — A memory device located on the processor and addressable via
the SMBus which can be used by the OEM to store information useful for
system management.
• SMBus — System Management Bus. A two-wire interface through which simple
system and power management related devices can communicate with the rest of
the system. It is based on the principals of the operation of the I2C* two-wire serial
bus developed by Phillips Semiconductor. SMBus is a subset of the I2C bus/protocol
developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/
protocol may require licensing from various entities, including, but not restricted to,
Philips Electronics N.V. and North American Philips Corporation.
• Storage Conditions — Refers to a non-operational state. The processor may be
installed in a platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor pins should not be connected
to any supply voltages, have any I/Os biased, or receive any clocks.
• Intel® Xeon® Processor E7-8800/4800/2800 Product Families — The entire
product, including processor core, die, substrate and integrated heat spreader
(IHS).
• Unit Interval (UI) — Intel QPI signaling convention is binary and unidirectional.
In this binary signaling, one bit is sent for every edge of the forwarded clock,
whether it be a rising edge or a falling edge. If a number of edges are collected at
instances t1, t2, tn,...., tk then the UI at instance “n” is defined as:
UI n = t n - t
n - 1
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