Signal Description
Table 2-17. Miscellaneous Signals (Sheet 2 of 2)
Name
Type
Description
Secondary RTC Reset: This signal resets the manageability register
bits in the RTC well when the RTC battery is removed.
NOTES:
SRTCRST#
I
1.
The SRTCRST# input must always be high when all other RTC
power planes are on.
2.
In the case where the RTC battery is dead or missing on the
platform, the SRTCRST# pin must rise before the RSMRST#
pin.
Test Point 0: This signal must have an external pull-up to
VccSus3_3.
TP0 / GPIO72
(Corporate Only)
I
ICH10 Corporate: Pin can instead be used as GPIO72.
Test Point 3: Route signal to a test point.
Test Point 4: Route signal to a test point.
Test Point 5: Route signal to a test point.
Test Point 6: Route signal to a test point.
Test Point 7: Route signal to a test point.
TP3
TP4
TP5
TP6
TP7
I/O
I/O
I/O
I
O
2.18
Intel® High Definition Audio Link
Table 2-18. Intel® High Definition Audio Link Signals
Name
Type
Description
Intel® High Definition Audio Reset: Master hardware reset to
external codec(s).
HDA_RST#
O
Intel High Definition Audio Sync: 48 kHz fixed rate sample
sync to the codec(s). Also used to encode the stream number.
HDA_SYNC
O
NOTE: This signal is sampled as a functional strap. See
Section 2.25.1 for more details. There is a weak
integrated pull-down resistor on this pin.
66
Datasheet
INTEL [ INTEL ]
