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319973-003 参数 Datasheet PDF下载

319973-003图片预览
型号: 319973-003
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔I / O控制器中枢10 [Intel I/O Controller Hub 10]
分类和应用: 控制器
文件页数/大小: 840 页 / 5889 K
品牌: INTEL [ INTEL ]
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PCI-to-PCI Bridge Registers (D30:F0)  
Bit  
Description  
Memory Read Multiple Prefetch Disable (MRMPD) — R/W.  
0 = MRM commands will fetch multiple cache lines as defined by the prefetch  
2
algorithm.  
1 = Memory read multiple (MRM) commands will fetch only up to a single, 64-byte  
aligned cache line.  
Memory Read Line Prefetch Disable (MRLPD) — R/W.  
0 = MRL commands will fetch multiple cache lines as defined by the prefetch algorithm.  
1 = Memory read line (MRL) commands will fetch only up to a single, 64-byte aligned  
cache line.  
1
0
Memory Read Prefetch Disable (MRPD) — R/W.  
0 = MR commands will fetch up to a 64-byte aligned cache line.  
1 = Memory read (MR) commands will fetch only a single DW.  
11.1.22 BPS—Bridge Proprietary Status Register  
(PCI-PCI—D30:F0)  
Offset Address: 48h4Bh  
Attribute:  
Size:  
R/WC, RO  
32 bits  
Default Value:  
00000000h  
Bit  
Description  
31:17 Reserved  
PERR# Assertion Detected (PAD) — R/WC. This bit is set by hardware whenever the  
PERR# pin is asserted on the rising edge of PCI clock. This includes cases in which the  
chipset is the agent driving PERR#. It remains asserted until cleared by software  
writing a 1 to this location. When enabled by the PERR#-to-SERR# Enable bit (in the  
Bridge Policy Configuration register), a 1 in this bit can generate an internal SERR# and  
be a source for the NMI logic.  
16  
This bit can be used by software to determine the source of a system problem.  
15:7  
Reserved  
Number of Pending Transactions (NPT) — RO. This field indicates to debug  
software how many transactions are in the pending queue. Possible values are:  
000 = No pending transaction  
001 = 1 pending transaction  
010 = 2 pending transactions  
011 = 3 pending transactions  
100 = 4 pending transactions  
101 = 5 pending transactions  
6:4  
110 - 111 = Reserved  
NOTE: This field is not valid if DTC.MDT (offset 44h:bits 7:6) is any value other than  
‘00.  
3:2  
1:0  
Reserved  
Number of Active Transactions (NAT) — RO. This field indicates to debug software  
how many transactions are in the active queue. Possible values are:  
00 = No active transactions  
01 = 1 active transaction  
10 = 2 active transactions  
11 = Reserved  
368  
Datasheet