Chipset Configuration Registers
10.1.67 D25IR—Device 25 Interrupt Route Register
Offset Address: 3150–3151h
Attribute:
Size:
R/W
16-bit
Default Value:
3210h
Bit
Description
15
14:12
11
Reserved
Interrupt D Pin Route (IDR): — R/W. Indicates which physical pin on the ICH is
connected to the INTD# pin reported for device 25 functions:
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt C Pin Route (ICR) — R/W. Indicates which physical pin on the ICH is
connected to the INTC# pin reported for device 25 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC# (Default)
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
10:8
6h = PIRQG#
7h = PIRQH#
7
Reserved
Interrupt B Pin Route (IBR) — R/W. Indicates which physical pin on the ICH is
connected to the INTB# pin reported for device 25 functions.
0h = PIRQA#
1h = PIRQB# (Default)
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6:4
6h = PIRQG#
7h = PIRQH#
3
Reserved
Interrupt A Pin Route (IAR) — R/W. Indicates which physical pin on the ICH is
connected to the INTA# pin reported for device 25 functions.
0h = PIRQA# (Default)
1h = PIRQB#
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
2:0
6h = PIRQG#
7h = PIRQH#
340
Datasheet
INTEL [ INTEL ]
