Functional Description
5.26
Feature Capability Mechanism
A set of registers is included in the ICH10 LPC Interface (Device 31, Function 0, offset
E0h - EBh) that allows the system software or BIOS to easily determine the features
supported by ICH10. These registers can be accessed through LPC PCI configuration
space, thus allowing for convenient single point access mechanism for chipset feature
detection.
This set of registers consists of:
Capability ID (FDCAP)
Capability Length (FDLEN)
Capability Version and Vendor-Specific Capability ID (FDVER)
Feature Vector (FVECT)
5.27
Integrated Trusted Platform Module (Corporate
Only)
The integrated Trusted Platform Module (TPM) implementation consists of firmware,
Intel Management Engine resources and dedicated hardware within the ICH and the
(G)MCH. The integrated TPM supports all requirements of the TPM Specification Version
1.2, Level 2 Revision 103, as published by the Trusted Computing Group.
Note:
Integrated TPM functionality requires a correctly configured system, including an
appropriate (G)MCH with Intel Management Engine firmware, ICH10 and SPI Flash.
5.27.1
Integrated TPM Hardware Requirements
The following hardware components are required for TPM 1.2 functionality:
1. SPI Flash Memory: The SPI flash component connected to the ICH (SPI interface)
provides non-volatile storage requirement for the integrated TPM. It contains the
FW code which is loaded by the Intel Management Engine upon power on.
2. Monotonic Counters: The ICH10 contains four TPM 1.2 compliant monotonic
counters that reside in the RTC well which maintains values programmed by the
integrated TPM across power cycles. The counters are only incremented by TPM
software (host or Intel ME) and are not controlled by the ICH hardware.
3. Physical Presence: Physical presence indication is required in order to enable
certain TPM commands. These commands are generally used to bypass owner
authorized commands when the authorization data is unavailable or to set the
integrated TPM to a non-owner state. The Intel Management Engine Firmware uses
the TPM_PP pin on the ICH10 to indicate Physical Presence to the platform when
pulled high. In addition, Physical Presence flags can be set to force Physical
Presence by firmware.
4. Chipset: An ICH10 and (G)MCH with Intel Management Engine enabled is required
for integrated TPM support.
Datasheet
241
INTEL [ INTEL ]
