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319973-003 参数 Datasheet PDF下载

319973-003图片预览
型号: 319973-003
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔I / O控制器中枢10 [Intel I/O Controller Hub 10]
分类和应用: 控制器
文件页数/大小: 840 页 / 5889 K
品牌: INTEL [ INTEL ]
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Functional Description  
5.27.2  
Enabling integrated TPM  
The integrated TPM is enabled based on the combination of a functional straps on both  
the ICH and the (G)MCH and a soft strap bit found in the SPI Descriptor. When the  
integrated TPM is enabled, Front Side Bus cycles that would otherwise propagate to the  
LPC bus will be routed by the Config Bus Decoder to the integrated TPM Host Decoder.  
Either Functional strap or the soft strap bit may be used to disable the integrated TPM.  
ICH Functional Strap: The ICH10 enables Integrated TPM when SPI_MOSI is  
sampled high on the rising edge of CLPWROK and disabled if the SPI_MOSI signal is  
sampled low. See Section 2.25.1 for details. The SPI_MOSI signal requires an  
external pull-up resistor to enable the integrated TPM. SPI_MOSI has an integrated  
pull-down resistor enabled at reset only and does not require an external pull-down  
resistor to disable integrated TPM.  
Soft Strap: The integrated TPM Disable bit (bit 2) in the (G)MCHSTRP0 register  
(FSMBA + 0h) within the flash descriptor can act as an override to the functional  
straps on both the ICH and (G)MCH. When set, the integrated TPM will be disabled  
regardless of the values of the functional straps on the ICH and/or (G)MCH. This bit  
along with both functional straps must be appropriately configured to enable  
integrated TPM.  
(G)MCH Functional Strap: For (G)MCH functional strap information, consult the  
appropriate (G)MCH documentation.  
§ §  
242  
Datasheet  
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