Functional Description
Bit Stuff Error
A bit stuff error results from the detection of a sequence of more that six 1s in a row
within the incoming data stream. This causes the C_ERR field of the TD to be
decremented. When the C_ERR field decrements to 0, the Active bit in the TD is cleared
to 0, the Stalled bit is set to 1, the USB Error Interrupt bit in the HC Status register is
set to 1 at the end of the frame and a hardware interrupt is signaled to the system.
5.18.6.2
Non-Transaction Based Interrupts
If an ICH10 process error or system error occurs, the ICH10 halts and immediately
issues a hardware interrupt to the system.
Resume Received
This event indicates that the ICH10 received a RESUME signal from a device on the USB
bus during a global suspend. If this interrupt is enabled in the Interrupt Enable register,
a hardware interrupt is signaled to the system allowing the USB to be brought out of
the suspend state and returned to normal operation.
ICH10 Process Error
The HC monitors certain critical fields during operation to ensure that it does not
process corrupted data structures. These include checking for a valid PID and verifying
that the MaxLength field is less than 1280. If it detects a condition that would indicate
that it is processing corrupted data structures, it immediately halts processing, sets the
HC Process Error bit in the HC Status register and signals a hardware interrupt to the
system.
This interrupt cannot be disabled through the Interrupt Enable register.
Host System Error
The ICH10 sets this bit to 1 when a Parity error, Master Abort, or Target Abort occurs.
When this error occurs, the ICH10 clears the Run/Stop bit in the Command register to
prevent further execution of the scheduled TDs. This interrupt cannot be disabled
through the Interrupt Enable register.
196
Datasheet
INTEL [ INTEL ]
