Intel® HD Audio (D27:F0)
10.3.35 SDLVI—Stream Descriptor Last Valid Index Register
Memory Address:
Input Stream[0]: LBAR + 8Ch
Input Stream[1]: LBAR + ACh
Output Stream[0]: LBAR + CCh
Output Stream[1]: LBAR + ECh
0000h
Attribute: R/W, RO
Default Value:
Size:
16 bits
Default
Bit
and
Description
Access
00h
RO
15:8
Reserved
Last Valid Index: The value written to this register indicates the index for
the last valid Buffer Descriptor in BDL. After the controller has processed
this descriptor, it will wrap back to the first descriptor in the list and
continue processing.
00h
R/W
7:0
This field must be at least 1 (i.e., there must be at least 2 valid entries in
the buffer descriptor list before DMA operations can begin).
This value should only modified when the RUN bit is 0.
10.3.36 SDFIFOW—Stream Descriptor FIFO Watermark Register
Memory Address:
Input Stream[0]: LBAR + 8Eh
Input Stream[1]: LBAR + AEh
Output Stream[0]: LBAR + CEh
Output Stream[1]: LBAR + EEh
0004h
Attribute: R/W, RO
Default Value:
Size:
16 bits
Default
Bit
and
Description
Access
0
RO
15:3
Reserved
FIFO Watermark (FIFOW). Indicates the minimum number of bytes
accumulated/free in the FIFO before the controller will start a fetch/
eviction of data.
010 = 8 B
011 = 16 B
100b
R/W
2:0
100 = 32 B (Default)
Others = Unsupported
NOTE: When the bit field is programmed to an unsupported size, the
hardware sets itself to the default value. Software must read the
bit field to test if the value is supported after setting the bit field.
Datasheet
165
INTEL [ INTEL ]
