Intel® HD Audio (D27:F0)
Table 27.
Intel HD Audio Memory Mapped Configuration Registers (Sheet 3 of 3)
LBAR +
Offset
Mnemonic
Register Name
Default
Access
E4h–E7h
OSD1LPIB
OSD1CBL
OSD1LVI
OSD1 Link Position in Buffer
OSD1 Cyclic Buffer Length
OSD1 Last Valid Index
OSD1 FIFO Watermark
OSD1 FIFO Size
00000000h RO
00000000h R/W
E8h–EBh
ECh–EDh
EEh–EFh
F0h–F1h
F2h–F3h
F8h–FBh
0000h
0004h
00BFh
0000h
R/W, RO
OSD1FIFOW
OSD1FIFOS
OSD1FMT
OSD1BDPL
R/W, RO
R/W, RO
R/W, RO
OSD1 Format
OSD1 Buffer Descriptor List Pointer
00000000h R/W, RO
Vendor-Specific Memory Mapped Registers1
1030h–1033h EM1
Extended Mode 1
0C00000h
R/W, RO
1004h–1007h INRC
1008h–100Bh OUTRC
100Ch–100Fh FIFOTRK
1010h–1013h I0DPIB
1014h–1017h I1DPIB
Input Stream Repeat Count
Output Stream Repeat Count
FIFO Tracking
00000000h RO
00000000h RO
000FF800h RO, R/W
Input Stream 0 DMA Position in Buffer 00000000h RO
Input Stream 1 DMA Position in Buffer 00000000h RO
Output Stream 0 DMA Position in
00000000h RO
1020h–1023h O0DPIB
1024h–1027h O1DPIB
Buffer
Output Stream 1 DMA Position in
00000000h RO
Buffer
1030h–1033h EM2
Extended Mode 2
00000000h R/W, RO
00000000h RO
00000000h RO
00000000h RO
00000000h RO
00000000h RO
2030h–2033h WLCLKA
2084h–2087h ISD0LPIBA
20A4h–20A7h ISD1LPIBA
2104h–2107h OSD0LPIBA
2124h–2127h OSD1LPIBA
Wall Clock Counter Alias
ISD0 Link Position in Buffer Alias
ISD1 Link Position in Buffer Alias
OSD0 Link Position in Buffer Alias
OSD1 Link Position in Buffer Alias
NOTES:
1.
The 4-KB memory-mapped range starting at LBAR + 4 KB is reserved in the Intel HD Audio
specification for Vendor-specific registers.
2.
Address locations that are not shown should be treated as Reserved.
Datasheet
143
INTEL [ INTEL ]
