Intel® HD Audio (D27:F0)
Table 27.
Intel HD Audio Memory Mapped Configuration Registers (Sheet 2 of 3)
LBAR +
Offset
Mnemonic
Register Name
Default
Access
70h–73h
DPBASE
ISD0CTL
DMA Position Base Address
00000000h R/W, RO
Input Stream Descriptor 0 (ISD0)
Control
80-82h
83h
040000h
00h
R/W, RO
R/WC,
RO
ISD0STS
ISD0 Status
84h–87h
88h–8Bh
8Ch–8dh
8Eh–8Fh
90h–91h
92h–93h
ISD0LPIB
ISD0CBL
ISD0LVI
ISD0 Link Position in Buffer
ISD0 Cyclic Buffer Length
ISD0 Last Valid Index
ISD0 FIFO Watermark
ISD0 FIFO Size
00000000h RO
00000000h R/W
0000h
0004h
0077h
0000h
R/W, RO
ISD0FIFOW
ISD0FIFOS
ISD0FMT
R/W, RO
RO
ISD0 Format
R/W, RO
R/W, RO,
WO
98h–9Bh
A0h–A2h
A3h
ISD0BDPL
ISD1CTL
ISD1STS
ISD0 Buffer Descriptor List Pointer
00000000h
040000h
00h
Input Stream Descriptor 1(ISD01)
Control
R/W, RO
R/WC,
RO
ISD1 Status
A4h–A7h
A8h–ABh
ACh–ADh
AEh–AFh
B0h–B1h
B2-B3h
ISD1LPIB
ISD1CBL
ISD1LVI
ISD1 Link Position in Buffer
ISD1 Cyclic Buffer Length
ISD1 Last Valid Index
ISD1 FIFO Watermark
ISD1 FIFO Size
00000000h RO
00000000h R/W
0000h
0004h
0077h
0000h
R/W, RO
ISD1FIFOW
ISD1FIFOS
ISD1FMT
R/W, RO
RO
ISD1 Format
R/W, RO
R/W, RO,
WO
B8-BBh
C0h–C2h
C3h
ISD1BDPL
OSD0CTL
OSD0STS
ISD1 Buffer Descriptor List Pointer
00000000h
040000h
00h
Output Stream Descriptor 0 (OSD0)
Control
R/W, RO
R/WC,
RO
OSD0 Status
C4h–C7h
C8h–CBh
CCh–CDh
CEh–CFh
D0h–D1h
D2h-D3h
OSD0LPIB
OSD0CBL
OSD0LVI
OSD0 Link Position in Buffer
OSD0 Cyclic Buffer Length
OSD0 Last Valid Index
OSD0 FIFO Watermark
OSD0 FIFO Size
00000000h RO
00000000h R/W
0000h
0004h
00BFh
0000h
R/W, RO
OSD0FIFOW
OSD0FIFOS
OSD0FMT
R/W, RO
R/W, RO
R/W, RO
OSD0 Format
R/W, RO,
WO
D8h–DBh
E0h–E2h
123h
OSD0BDPL
OSD1CTL
OSD1STS
OSD0 Buffer Descriptor List Pointer
00000000h
040000h
00h
Output Stream Descriptor 1 (OSD1)
Control
R/W, RO
R/WC,
RO
OSD1 Status
142
Datasheet
INTEL [ INTEL ]
