17.3 ACPI Device Configuration................................................................................ 357
17.3.1 SMBASE—SMBus Base Address Register.................................................. 357
17.3.2 GPIOBASE—GPIO Base Address Register ................................................. 358
17.3.3 PM1BASE—PM1_BLK Base Address Register............................................. 358
17.3.4 GPE0BASE—GPE0_BLK Base Address Register.......................................... 359
17.3.5 LPCS—LPC Clock Control Register........................................................... 359
17.3.6 ACPI_CTL—ACPI Control Register ........................................................... 360
17.3.7 MC - Miscellaneous Control Register........................................................ 360
17.4 Interrupt Control............................................................................................. 361
17.4.1 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control Register........................... 361
17.4.2 SIRQ_CTL—Serial IRQ Control Register ................................................... 361
17.5 FWH Configuration Registers............................................................................. 362
17.5.1 FWH_IDSEL—FWH ID Select Register...................................................... 362
17.5.2 BDE—BIOS Decode Enable .................................................................... 363
17.5.3 BIOS_CTL—BIOS Control Register .......................................................... 364
17.6 Root Complex Register Block Configuration......................................................... 364
17.6.1 RCBA—Root Complex Base Address Register............................................ 364
18
ACPI Functions..................................................................................................... 365
18.1 8254 Timer .................................................................................................... 365
18.1.1 Overview ............................................................................................ 365
18.1.2 Timer Programming.............................................................................. 366
18.1.3 Reading From the Interval Timer............................................................ 367
18.1.4 I/O Registers....................................................................................... 368
18.2 High Precision Event Timer ............................................................................... 373
18.2.1 Functional Overview ............................................................................. 373
18.2.2 Registers............................................................................................. 374
18.3 8259 Interrupt Controller ................................................................................. 379
18.3.1 Overview ............................................................................................ 379
18.3.2 Interrupt Handling................................................................................ 380
18.3.3 Initialization Command Words (ICW) ...................................................... 381
18.3.4 Operation Command Words (OCW)......................................................... 382
18.3.5 Modes of Operation .............................................................................. 382
18.3.6 End of Interrupt (EOI)........................................................................... 384
18.3.7 Masking Interrupts ............................................................................... 384
18.3.8 Steering of PCI Interrupts...................................................................... 385
18.3.9 I/O Registers....................................................................................... 385
18.4 Advanced Peripheral Interrupt Controller (IOxAPIC)............................................. 392
18.4.1 Functional Overview ............................................................................. 392
18.4.2 Unsupported Modes.............................................................................. 392
18.4.3 PCI Express Interrupts.......................................................................... 393
18.4.4 Routing of Internal Device Interrupts ...................................................... 394
18.4.5 Memory Registers ................................................................................ 394
18.5 Serial Interrupt............................................................................................... 397
18.5.1 Overview ............................................................................................ 397
18.5.2 Start Frame......................................................................................... 397
18.5.3 Data Frames........................................................................................ 398
18.5.4 Stop Frame ......................................................................................... 398
18.5.5 Unsupported Serial Interrupts................................................................ 398
18.5.6 Data Frame Format .............................................................................. 399
18.6 Real Time Clock .............................................................................................. 400
18.6.1 Overview ............................................................................................ 400
18.6.2 Update Cycles...................................................................................... 400
18.6.3 Interrupts ........................................................................................... 400
18.6.4 Lockable RAM Ranges ........................................................................... 400
Datasheet
13
INTEL [ INTEL ]
