Functional Description
10.2.2.1
Rules for Populating DIMM Slots
•
•
In all modes, the frequency of System Memory will be the lowest frequency of all
of the DIMMs in the system, as determined through the SPD registers on the
DIMMs.
In Single Channel mode, any DIMM slot within the channel may be populated in
any order. Either channel may be used. To save power, do not populate the
unused channel.
•
•
In Dual Channel Asymmetric mode, any DIMM slot may be populated in any order.
In Dual Channel Interleaved mode, any DIMM slot may be populated in any order,
but the total memory in each channel must be the same.
•
In Flex memory mode, any DIMM slot may be populated in any order per channel,
but each channel must have at least 1 DIMM. The matching amount of memory
per channel will be run in Dual channel interleaved mode and the remaining
unmatched memory will run in Asymmetric mode.
10.2.2.2
System Memory Supported Configurations
The GMCH supports the 256Mbit, 512Mbit, and 1Gbit technology-based DIMMs shown
in Table 10-3.
Table 10-3. DDR2 DIMM Supported Configurations
Technology
Configuration
# of Row
Address
Bits
# of
Column
Address
Bits
# of Bank
Address
Bits
Page
Size
Rank
Size
256Mbit
256Mbit
512Mbit
512Mbit
1Gbit
16M X 16
32M X 8
13
13
13
14
13
14
9
2
2
2
2
3
3
4K
8K
8K
8K
8K
8K
128 MB
256 MB
256 MB
512 MB
512 MB
1 GB
10
10
10
10
10
32M X 16
64M X 8
64M X 16
128M X 8
1Gbit
10.2.3
Main Memory DRAM Address Translation and Decoding
The following tables specify the host interface to memory interface address multiplex
for the GMCH. Refer to the details of the various DIMM configurations as described in
Table 10-3.
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Datasheet
INTEL [ INTEL ]
