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317607-001 参数 Datasheet PDF下载

317607-001图片预览
型号: 317607-001
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 351 页 / 2481 K
品牌: INTEL [ INTEL ]
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Integrated Graphics Device Registers (D2:F0,F1)  
8.2.15  
8.2.16  
8.2.17  
MINGNT—Minimum Grant  
B/D/F/Type:  
Address Offset:  
Default Value:  
Access:  
0/2/1/PCI  
3Eh  
00h  
RO  
Size:  
8 bits  
Bit  
Access &  
Default  
Description  
7:0  
RO  
Minimum Grant Value (MGV): The IGD does not burst as a PCI  
00h  
compliant master.  
MAXLAT—Maximum Latency  
B/D/F/Type:  
Address Offset:  
Default Value:  
Access:  
0/2/1/PCI  
3Fh  
00h  
RO  
Size:  
8 bits  
Bit  
Access &  
Default  
Description  
7:0  
RO  
Maximum Latency Value (MLV): The IGD has no specific  
00h  
requirements for how often it needs to access the PCI bus.  
MCAPPTR—Mirror of Dev 0 Capabilities Pointer  
B/D/F/Type:  
Address Offset:  
Default Value:  
Access:  
0/2/1/PCI  
44h  
E0h  
RO;  
8 bits  
Size:  
The CAPPTR provides the offset that is the pointer to the location of the first device  
capability in the capability list.  
Bit  
Access &  
Default  
Description  
7:0  
RO  
Mirror of CAPPTR (MCAPPTR): Pointer to the offset of the first  
capability ID register block. In this case the first capability is the  
product-specific Capability Identifier (CAPID0).  
Datasheet  
257