Electrical Specifications
Table 11.
GTL+ Asynchronous Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes1
2, 3
VIL
VIH
VOH
Input Low Voltage
Input High Voltage
Output High Voltage
0.0
VTT/2 – (0.10 * VTT)
V
V
V
4, 5, 6, 3
7, 5, 6
VTT/2 + (0.10 * VTT)
0.90*VTT
VTT
VTT
VTT/
8
IOL
Output Low Current
—
A
[(0.50*RTT_MIN)+(RON_MIN)]
9
ILI
ILO
Input Leakage Current
Output Leakage Current
Buffer On Resistance
N/A
N/A
6
± 200
± 200
12
µA
µA
Ω
10
RON
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals VIH = GTLREF +
(0.10 * VTT) and VIL= GTLREF – (0.10 * VTT).
4. VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. VIH and VOH may experience excursions above VTT. However, input signal drivers must comply with the
signal quality specifications.
6. The VTT referred to in these specifications refers to instantaneous VTT.
7. All outputs are open drain.
8. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
9. Leakage to VSS with land held at VTT.
10.Leakage to VTT with land held at 300 mV.
.
Table 12.
PWRGOOD and TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes1,2
3
VHYS
Input Hysteresis
120
396
mV
PWRGOOD Input low-
to-high threshold
voltage
0.5 * (VTT + VHYS_MIN 0.5 * (VTT + VHYS_MAX
4, 5
V
+ 0.24)
+ 0.24)
VT+
TAP Input low-to-high
threshold voltage
4
0.5 * (VTT + VHYS_MIN
)
0.5 * (VTT + VHYS_MAX
)
V
PWRGOOD Input high-
to-low threshold
voltage
4
0.4 * VTT
0.6 * VTT
V
VT-
TAP Input high-to-low
threshold voltage
4
0.5 * (VTT – VHYS_MAX
)
0.5 * (VTT – VHYS_MIN
)
V
6, 4
VOH
IOL
ILI
Output High Voltage
Output Low Current
Input Leakage Current
N/A
—
VTT
22.2
V
7
mA
8
—
± 200
µA
Output Leakage
Current
9
ILO
—
6
± 200
12
µA
RON
Buffer On Resistance
Ω
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open drain.
3. VHYS represents the amount of hysteresis, nominally centered about 0.5 * VTT, for all TAP inputs.
4. The VTT referred to in these specifications refers to instantaneous VTT.
26
Datasheet
INTEL [ INTEL ]
