SMART 3 ADVANCED BOOT BLOCK
E
3.2.1
READ ARRAY
There are two commands that modify array data:
Program (40H) and Erase (20H). Writing either of
these commands to the internal Command User
Interface (CUI) initiates a sequence of internally-
timed functions that culminate in the completion of
the requested task (unless that operation is aborted
by either RP# being driven to VIL for tPLRH or an
appropriate suspend command).
When RP# transitions from VIL (reset) to VIH, the
device defaults to read array mode and will respond
to the read control inputs (CE#, address inputs, and
OE#) without any additional CUI commands.
When the device is in read array mode, four control
signals control data output:
3.2
Modes of Operation
•
•
•
•
WE# must be logic high (VIH)
CE# must be logic low (VIL)
OE# must be logic low (VIL)
RP# must be logic high (VIH)
The flash memory has four read modes and two
write modes. The read modes are read array, read
identifier, read status and read query (see Appendix
C). The write modes are program and block erase.
Three additional modes (erase suspend to program,
erase suspend to read and program suspend to
read) are available only during suspended
operations. These modes are reached using the
In addition, the address of the desired location must
be applied to the address pins. If the device is not
in read array mode, as would be the case after a
program or erase operation, the Read Array
command (FFH) must be written to the CUI before
array reads can take place.
commands
summarized
in
Table 4.
A
comprehensive chart showing the state transitions
is in Appendix A.
Table 4. Command Codes and Descriptions
Description
Code Device Mode
00,
01,
60,
2F,
C0,
98
Unassigned commands that should not be used. Intel reserves the right to
redefine these codes for future functions.
Invalid/
Reserved
FF
Read Array
Places the device in read array mode, such that array data will be output on the
data pins.
40
Program
Set-Up
This is a two-cycle command. The first cycle prepares the CUI for a program
operation. The second cycle latches addresses and data information and
initiates the WSM to execute the Program algorithm. The flash outputs status
register data when CE# or OE# is toggled. A Read Array command is required
after programming to read array data. See Section 3.2.4.
10
20
Alternate
Program Set-Up
(See 40H/Program Set-Up)
Erase
Set-Up
Prepares the CUI for the Erase Confirm command. If the next command is not
an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the
status register to a “1,” (b) place the device into the read status register mode,
and (c) wait for another command. See Section 3.2.5.
14
PRELIMINARY
INTEL [ INTEL ]
