A10-DATASHEET
2015.12.31
60
HPS Clock Performance
HPS Clock Performance
Table 56: HPS Clock Performance for Arria 10 Devices—Preliminary
Symbol/Description
–3 Speed Grade
–2 Speed Grade
–1 Speed Grade
Unit
mpu_base_clk
noc_base_clk
h2f_user0_clk
h2f_user1_clk
hmc_free_clk
800
400
400
400
433
1200
400
400
400
533
1500
500
400
400
533
MHz
MHz
MHz
MHz
MHz
HPS PLL Specifications
HPS PLL Input Requirements
Table 57: HPS PLL Input Requirements for Arria 10 Devices—Preliminary
Description
Min
10
Typ
—
Max
50
2
Unit
MHz
%
Clock input range
Clock input jitter tolerance
Clock input duty cycle
—
—
45
50
55
%
HPS PLL Performance
Table 58: HPS PLL Performance for Arria 10 Devices—Preliminary
–3 Speed Grade
Description
–2 Speed Grade
–1 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
HPS PLL VCO output
320
1600
320
2400
320
3000
MHz
Arria 10 Device Datasheet
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