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10AS066K4F40E3SG 参数 Datasheet PDF下载

10AS066K4F40E3SG图片预览
型号: 10AS066K4F40E3SG
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 660000-Cell, CMOS, PBGA1517, 40 X 40 MM, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 110 页 / 1391 K
品牌: INTEL [ INTEL ]
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A10-DATASHEET  
2015.12.31  
34  
Transceiver Specifications for Arria 10 GX, SX, and GT Devices  
Table 34: Transmitter Specifications—Preliminary  
Transceiver Speed Grades 1, 2, 3, 4, and 5  
Typ  
Symbol/Description  
Condition  
Unit  
Min  
Max  
Supported I/O  
Standards  
High Speed Differential I/O (47)  
85-Ω setting  
100-Ω setting  
120-Ω setting  
150-Ω setting  
VCCT = 0.95 V  
VCCT = 1.03 V  
VCCT = 1.12 V  
VCCT = 0.95 V  
VCCT = 1.03 V  
VCCT = 1.12 V  
20% to 80%  
20  
20  
85 20%  
100 20%  
120 20%  
150 20%  
450  
Ω
Ω
Differential on-  
chip termination  
resistors  
Ω
Ω
mV  
mV  
mV  
mV  
mV  
mV  
ps  
VOCM (AC  
coupled)  
500  
550  
450  
VOCM (DC  
coupled)  
500  
550  
Rise time (48)  
Fall time (48)  
130  
130  
80% to 20%  
ps  
Intra-differential TX VCM = 0.5 V and  
pair skew(49)  
slew rate of 15 ps  
15  
ps  
(47)  
(48)  
(49)  
High Speed Differential I/O is the dedicated I/O standard for the transmitter in Arria 10 transceivers.  
The Quartus Prime software automatically selects the appropriate slew rate depending on the configured data rate or functional mode.  
In QPI mode, if VCM < 0.17 V, the input Vid must be greater than 100 mV. If VCM > 0.17 V, the input Vid must be greater than 70 mV.  
Arria 10 Device Datasheet  
Send Feedback  
Altera Corporation  
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