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IA8344-PLC44I-01 参数 Datasheet PDF下载

IA8344-PLC44I-01图片预览
型号: IA8344-PLC44I-01
PDF下载: 下载PDF文件 查看货源
内容描述: SDLC通信控制器 [SDLC COMMUNICATIONS CONTROLLER]
分类和应用: 通信控制器外围集成电路装置时钟
文件页数/大小: 49 页 / 218 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA8044/IA8344  
SDLC COMMUNICATIONS CONTROLLER  
Data Sheet  
SMD Select Clock Mode Bits  
SCM  
2 1 0  
Clock Mode  
Data Rate  
(Bits/sec)*  
0 0 0 Externally clocked  
0 – 2.4M**  
0 0 1 Undefined  
0 1 0 Self clocked, timer overflow  
0 1 1 Undefined  
244 – 62.5K  
1 0 0 Self clocked, external 16X  
1 0 1 Self clocked, external 32X  
1 1 0 Self clocked, internal fixed  
1 1 1 Self clocked, internal fixed  
0 – 375K  
0 – 187.5K  
375K  
187.5K  
* based on a12 MHz crystal frequency  
** 0 – 1M bps in loop configuration  
Status/Command Register (STS):  
The Status/Command register provides SIU control from and status to the CPU. The SIU can read  
the STS and can write certain bits in the STS. The CPU can read and write the STS. Accessing the  
STS by the CPU via 2 cycle instructions (JBC bit,rel and MOV bit,C) should not be used. STS is bit  
addressable.  
STS  
Bit: 7  
6
5
4
3
2
1
0
TBF  
RBE  
RTS  
SI  
BOV  
OPB  
AM  
RBP  
STS.0  
STS.1  
RBP  
Receive buffer protect. When set prevents writing of data into  
the receive buffer. Causes RNR response instead of RR in AUTO  
mode.  
Auto mode. Dual purpose bit depending upon the setting of bit NB  
(SMD.1). If NB is cleared, AM selects the AUTO mode when  
set, Flexible mode when clear. If NB is set, AM selects the addressed  
mode when set and the non-addressed mode when clear. The SIU  
can clear AM.  
AM  
STS.2  
OPB  
Optional poll bit. When set the SIU will AUTO respond to an  
optional poll (UP with P=0). The SIU can set or clear the OPB.  
Receive buffer overrun. The SIU can set or clear BOV.  
SIU interrupt. This bit is set by the SIU and should be cleared  
by the CPU before returning from the interrupt routine.  
Request to send. This bit is set when the SIU is ready to  
transmit or is transmitting. May be written by the SIU in AUTO  
mode. RTS is only applied to the external pin in non-loop mode.  
Can be thought of as a Transmit Enable. Note: RTS signal at the  
pin (P1.6) is the inverted version of this bit.  
STS.3  
STS.4  
BOV  
SI  
STS.5  
RTS  
Copyright 2003  
innovASIC  
ENG210010112-00  
www.innovasic.com  
Customer Support:  
1-888-824-4184  
The End of Obsolescence  
Page 28 of 49  
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