IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
LIST OF FIGURES
Figure 1. IA186ER LQFP Package Diagram................................................................................16
Figure 2. IA188ER LQFP Package Diagram................................................................................19
Figure 3. LQFP Package Dimensions...........................................................................................22
Figure 4. IA186ER PQFP Package Diagram................................................................................23
Figure 5. IA188ER PQFP Package Diagram................................................................................26
Figure 6. PQFP Package Dimensions ...........................................................................................29
Figure 7. Functional Block Diagram ............................................................................................45
Figure 8. Crystal Configuration....................................................................................................46
Figure 10. Read Cycle.................................................................................................................109
Figure 11. Multiple Read Cycles ................................................................................................110
Figure 12. Write Cycle................................................................................................................112
Figure 13. Multiple Write Cycles ...............................................................................................113
Figure 14. PSRAM Read Cycle..................................................................................................115
Figure 15. PSRAM Write Cycle .................................................................................................117
Figure 16. PSRAM Refresh Cycle..............................................................................................119
Figure 17. Internal RAM Show Read Cycle...............................................................................120
Figure 18. Interrupt Acknowledge Cycle....................................................................................121
Figure 19. Software Halt Cycle ..................................................................................................123
Figure 20. Clock—Active Mode.................................................................................................124
Figure 21. Clock—Power-Save Mode........................................................................................124
Figure 22. srdy—Synchronous Ready........................................................................................125
Figure 23. ardy—Asynchronous Ready......................................................................................126
Figure 24. Peripherals .................................................................................................................126
Figure 25. Reset 1 .......................................................................................................................127
Figure 26. Reset 2 .......................................................................................................................127
Figure 27. Bus Hold Entering.....................................................................................................128
Figure 28. Bus Hold Leaving......................................................................................................128
Figure 29. Synchronous Serial Interface.....................................................................................129
IA211110517-02
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