IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
5.1.43 INTSTS (030h) (Slave Mode) ........................................................................91
5.1.44 REQST (02eh) (Master Mode).......................................................................92
5.1.45 REQST (02eh) (Slave Mode) .........................................................................93
5.1.46 INSERV (02ch) (Master Mode) .....................................................................93
5.1.47 INSERV (02ch) (Slave Mode)........................................................................94
5.1.48 PRIMSK (02ah) (Master and Slave Mode) ....................................................95
5.1.49 IMASK (028h) (Master Mode).......................................................................95
5.1.50 IMASK (028h) (Slave Mode).........................................................................96
5.1.51 POLLST (026h) (Master Mode).....................................................................97
5.1.52 POLL (024h) (Master Mode)..........................................................................97
5.1.53 EOI (022h) End-Of-Interrupt Register (Master Mode) ..................................98
5.1.54 EOI (022h) Specific End-Of-Interrupt Register (Slave Mode) ......................98
5.1.55 INTVEC (020h) Interrupt Vector Register (Slave Mode)..............................99
5.1.56 SSR (018h)......................................................................................................99
5.1.57 SSD0 (016h) and SSD1 (014h).......................................................................99
5.1.58 SSC (012h)....................................................................................................100
5.1.59 SSS (010h)....................................................................................................100
5.2 Reference Documents ...............................................................................................101
AC Specifications ...............................................................................................................101
Instruction Set Summary Table ..........................................................................................130
7.1 Key to Abbreviations Used in Instruction Set Summary Table ................................140
7.1.1 Operand Address Byte..................................................................................140
7.1.2 Modifier Field...............................................................................................140
7.1.3 Auxiliary Field..............................................................................................141
7.1.4 r/m Field........................................................................................................141
7.1.5 Displacement ................................................................................................141
7.1.6 Immediate Bytes ...........................................................................................141
7.1.7 Segment Override Prefix ..............................................................................141
7.1.8 Segment Register..........................................................................................142
7.2 Explanation of Notation Used in Instruction Set Summary Table............................142
7.2.1 Opcode..........................................................................................................142
7.2.2 Flags Affected After Instruction...................................................................143
Innovasic/AMD Part Number Cross-Reference Table.......................................................144
Revision History.................................................................................................................145
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10. For Additional Information.................................................................................................146
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