IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
Table 15. Default Status of PIO Pins at Reset
Power-On
Power-On
PIO No. Associated Pin
Reset Status
Input with pull-up
Input with pull-down
Input with pull-up
Associated Pin PIO No.
Reset Status
Normal operation
Normal operation
Normal operation
Normal operation
Input with pull-up
Input with pull-up
a
0
1
2
3
4
5
6
7
8
9
tmrin1
tmrout1
pcs6_n/a2
pcs5_n/a1
dt/r_n
den_n
srdy
a17
a17
7
a
a18
8
a
a19
9
a
den_n
drq0
drq1
dt/r_n
int2
int4
mcs0_n
mcs1_n
mcs2_n
5
Input with pull-up
a
12
13
4
31
30
14
15
24
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
a
a
a
Normal operation
b
b
b
a
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
a
a18
a19
a
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
tmrout0
tmrin0
drq0
Input with pull-down
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-down
Input with pull-down
Input with pull-up
mcs3_n/rfsh_n 25
drq1
pcs0_n
pcs1_n
pcs2_n
pcs3_n
pcs5_n/a1
pcs6_n/a2
rxd/pio28
s6/clksel1_n
sclk
sdata
sden0
sden1
srdy
16
17
18
19
3
mcs0_n
mcs1_n
pcs0_n
pcs1_n
pcs2_n
pcs3_n
sclk
2
28
29
20
21
22
23
6
b,c
Input with pull-up
sdata
Input with pull-up
Input with pull-up
Input with pull-down
Input with pull-down
sden0
sden1
mcs2_n
d
mcs3_n/rfsh_n Input with pull-up
Normal operation
b,c
uzi_n/clksel2_n Input with pull-up
tmrin0
11
Input with pull-up
Input with pull-up
Input with pull-down
Input with pull-down
Input with pull-up
Input with pull-up
26
27
28
29
30
31
txd/pio27
rxd/pio28
s6/clksel1_n
int4
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
Input with pull-up
tmrin1
0
tmrout0
tmrout1
txd/pio27
10
1
27
b,c
int2
uzi_n/clksel2_n 26
a
b
Input with pullup option available when used as PIO.
Emulators use these pins and also a15–a0, ad15–ad0 (IA186ER), ale, bhe_n (IA186ER), clkouta, nmi, res_n,
and s2_n–s0_n.
c
If bhe_n/aden_n (IA186ER) or rfsh_n/aden_n (IA188ER) is held low during POR, these pins will revert to normal
operation.
d
Input with pulldown option available when used as PIO.
IA211110517-02
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