fido®2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
4 BGA Package
4.1 BGA Package Pinout
The pinout for the fido2100 Industrial Ethernet Switch BGA package is as shown in Figure 8. The corresponding pinout is provided in
Table 2.
p1_lnk_stts
p1_col
p2_txc
p1_led_grn
p1_crs
p2_txd[0]
p2_txen
p1_led_ylw
vcck
p2_txd[2]
p2_txd[1]
p2_txer
vcck
p2_rxc
p2_txd[3]
vcck
p2_rxdv
p2_rxer
vcc3io
p2_rxd[0]
p2_rxd[1]
vcc3io
p2_rxd[2]
p2_rxd[3]
vcc3io
p2_col
p2_crs
vcck
p2_lnk_stts
p2_led_ylw
test
p2_led_grn
sys_clk
reset_n
cpu_txen
M
L
K
J
p1_rxd[2]
p1_rxd[1]
p1_rxer
cpu_txer
cpu_txd[0]
cpu_txd[2]
cpu_txd[3]
cpu_rxdv
cpu_crs
p1_rxd[3]
p1_rxd[0]
p1_rxdv
gndio
vcc18a_pll
gnda_pll
vcck
cpu_txc
vcc3io
gndio
gndio
gndio
gndio
gndk
gndk
gndk
gndk
gndk
gndk
gndk
gndk
gndio
gndio
gndio
gndio
cpu_txd[1]
cpu_rxc
H
G
F
p1_rxc
vcc3io
p1_txd[3]
p1_txd[1]
p1_txer
p1_txd[2]
p1_txd[0]
p1_txc
vcc3io
vcc3io
cpu_rxer
vcck
vcc3io
cpu_rxd[0]
cpu_rxd[2]
cpu_adrs[2]
cpu_adrs[4]
cpu_adrs[6]
cpu_col
E
D
C
B
A
vcck
gndio
vcck
vcc3io
cpu_rxd[1]
cpu_rxd[3]
cpu_adrs[1]
cpu_adrs[3]
sw_event_irq_n
p1_txen
event_1_sig
ts_event_irq_n
cpu_cs_n
vcc3io
cpu_data[9]
cpu_data[5]
vcc3io
cpu_adrs[8]
cpu_data[1]
cpu_data[2]
cpu_adrs[5]
cpu_adrs[7]
cpu_data[0]
event_2_sig
pps_sig
cpu_rd_n
cpu_data[14] cpu_data[12] cpu_data[10] cpu_data[6]
cpu_data[3]
cpu_data[4]
cpu_wr_n
cpu_data[15] cpu_data[13] cpu_data[11] cpu_data[8]
cpu_data[7]
1
2
3
4
5
6
7
8
9
10
11
12
Figure 8 fido2100 BGA Package Pinout
31
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