fido2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
Pin
Signal Name
Type
BGA Pin Descriptions
H7 gndk
G8 gndio
ground digital core ground
ground i/o ground
K8 vcc3io
power 3.3 V i/o supply voltage
H11 cpu_txd[1]
J12 cpu_txd[2]
H12 cpu_txd[3]
G11 cpu_rxc
G12 cpu_rxdv
F10 vcc3io
F11 cpu_rxer
F12 cpu_crs
E12 cpu_col
E11 cpu_rxd[0]
D12 cpu_rxd[1]
D11 cpu_rxd[2]
E10 vcc3io
input
input
input
cpu mii, transmit data bit 1 from CPU
cpu mii, transmit data bit 2 from CPU
cpu mii, transmit data bit 3 from CPU
output cpu mii, 25 MHz receive clock to CPU
output cpu_mii, receive data valid to CPU
power 3.3 V i/o supply voltage
output cpu mii, receive error
output cpu mii,
output cpu mii, collision
output cpu mii, receive data bit 0 to CPU
output cpu mii, receive data bit 1 to CPU
output cpu mii, receive data bit 2 to CPU
power 3.3 V i/o supply voltage
ground i/o ground
F8 gndio
G7 gndk
ground digital core ground
G10 vcck
power 1.8 V digital core supply voltage
output cpu mii, receive data bit 3 to CPU
C12 cpu_rxd[3]
B12 cpu_adrs[1]
C11 cpu_adrs[2]
A12 cpu_adrs[3]
B11 cpu_adrs[4]
C10 cpu_adrs[5]
A11 cpu_adrs[6]
B10 cpu_adrs[7]
C9 cpu_adrs[8]
A10 cpu_data[0]
B9 cpu_data[1]
A9 cpu_data[2]
D9 vcck
input
input
input
input
input
input
input
input
bidir
cpu host interface, address bit 1
cpu host interface, address bit 2
cpu host interface, address bit 3
cpu host interface, address bit 4
cpu host interface, address bit 5
cpu host interface, address bit 6
cpu host interface, address bit 7
cpu host interface, address bit 8
cpu host interface, data bit 0
cpu host interface, data bit 1
cpu host interface, data bit 2
bidir
bidir
power 1.8 V digital core supply voltage
ground digital core ground
ground i/o ground
F7 gndk
E8 gndio
D10 vcc3io
power 3.3 V i/o supply voltage
B8 cpu_data[3]
A8 cpu_data[4]
C7 cpu_data[5]
bidir
bidir
bidir
cpu host interface, data bit 3
cpu host interface, data bit 4
cpu host interface, data bit 5
34
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