IA186EM/IA188EM
Data Sheet
8-Bit/16-Bit Microcontrollers
February 25, 2011
On the IA188EM microcontroller, wb_n provides an indication that a write to the bus is
occurring. It shares the same early timing as that of the non-multiplexed address bus, and is
associated with ad7–ad0. It is tristated during reset.
2.2.49 wr_n—Write Strobe (synchronous output)
The wr_n pin indicates to the system that the data currently on the bus is to be written to a
memory or I/O device. It is tristated during a bus hold or reset.
2.2.50 x1—Crystal Input (input)
The x1 and x2 pins are the connections for a fundamental-mode or third-overtone, parallel-
resonant crystal used by the internal oscillator circuit. An external clock source for the
microcontroller is connected to x1. The x2 is left unconnected.
2.2.51 x2—Crystal Input (input)
The x1 and x2 pins are the connections for a fundamental-mode or third-overtone, parallel-
resonant crystal used by the internal oscillator circuit. An external clock source for the
microcontroller is connected to x1. The x2 is left unconnected.
2.3
Pins Used by Emulators
The following pins are used by emulators:
a19–a0
ao15–ao8 (on the IA188EM)
ad7–ad0
ale
bhe_n/aden_n (on the IA186EM)
clkouta
rfsh2_n/aden_n (on the IA188EM)
rd_n
s2_n–s0_n
s6/lock_n/clkdiv2_n
uzi_n
Emulators require that s6/lock_n/clkdiv2_n and uzi_n be configured as their normal functions
(i.e., as s6 and uzi_n, respectively). Holding bhe_n/aden_n (IA186EM) or rfsh_n/aden_n
(IA188EM) low during the rising edge of res_n, will cause s6 and uzi_n to be configured in their
normal functions at reset instead of as PIOs.
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