IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 77. Alphabetic Key to Waveform Parameters (Continued)
a
a
Min
Max
–
8
No. Name
Description
Status Hold Time
ale Active Delay
8
9
tCHDX
tCHLH
0
0
11 tCHLL
ale Inactive Delay
0
8
79 tCHRFD clkouta High to rfsh_n Valid
0
0
–
–
–
25
–
12
6
25
35
5
3
tCHSV
Status Active Delay
x1 to clkouta Skew
x1 to clkoutb Skew
x1 Fall Time
69 tCICOA
70 tCICOB
39 tCKHL
36 tCKIN
40 tCKLH
x1 Period
66
5
x1 Rise time
46 tCL2CL1 clkouta Fall Time
–
3
50 tCLARX ardy Active Hold Time
4
–
5
6
tCLAV
tCLAX
ad Address Valid Delay
Address Hold
ad Address Float Delay
clkouta Low Time
x1 Low Time
0
0
0
12
12
12
–
–
–
15 tCLAZ
43 tCLCH
37 tCLCK
42 tCLCL
tCLCL/2
7.5
25
clkouta Period
80 tCLCLX lcs_n Inactive Delay
81 tCLCSL lcs_n Active Delay
16 tCLCSV mcs_n/pcs_n Inactive Delay
30 tCLDOX Data Hold Time
0
0
0
0
9
9
12
–
7
2
tCLDV
tCLDX
Data Valid Delay
Data in Hold
0
0
12
–
62 tCLHAV hlda Valid Delay
0
7
82 tCLRF
27 tCLRH
25 tCLRL
clkouta High to rfsh_n Invalid
0
0
0
0
12
10
10
6
rd_n Inactive Delay
rd_n Active Delay
Status Inactive Delay
4
tCLSH
48 tCLSRY srdy Transition Hold Time
55 tCLTMV Timer Output Delay
83 tCOAOB clkouta to clkoutb Skew
20 tCVCTV Control Active Delay 1
31 tCVCTX Control Inactive Delay
21 tCVDEX den_n Inactive Delay
3
0
3
–
0
0
–
12
1
10
10
9
17 tCXCSX mcs_n/pcs_n Hold from Command Inactive
98 tDSHDIW ds_n High to Data Invalid (Write)
41 tDSHLH ds_n Inactive to ale Inactive
tCLCH
0
tCLCH
–
tCHCL
–
a
In nanoseconds.
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