XMC4500
XMC4000 Family
Electrical Parameters
Table 56
EBU SDRAM Access Signal Timing Parameters
Symbol Limit Values
Parameter
Unit
Min.
Max.
9
A(15:0) output valid from SDCLKO
CC t6
CC t7
CC t8
CC t9
CC t10
SR t11
SR t12
CC t13
CC t14
CC t15
CC t16
CC t17
CC t18
CC t19
CC t22
CC t23
SR t21
–
ns
low-to-high
transition
A(15:0) output hold
3
–
3
–
3
–
3
–
3
–
3
–
3
–
2
3
4
–
CS(3:0) low
9
CS(3:0) high
RAS low
–
9
RAS high
–
CAS low
9
CAS high
–
RD/WR low
9
RD/WR high
BC(3:0) low
–
9
BC(3:0) high
D(15:0) output valid
D(15:0) output hold
CKE output valid1)
CKE output hold1)
D(15:0) input hold
–
9
–
7
–
–
D(15:0) input setup to SDCLKO low-to-high SR t20
–
transition
1) Not depicted in the read and write access timing figures below.
Data Sheet
99
V1.0, 2013-01
Subject to Agreement on the Use of Product Information
INFINEON [ Infineon ]
