XC2287 / XC2286 / XC2285
XC2000 Family Derivatives
Preliminary
General Device Information
Table 2
Pin Definitions and Functions (cont’d)
Pin Symbol
Ctrl. Type Function
20
VDDPA
-
PS/A Digital Pad Supply Voltage for Domain A
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The A/D_Converters and ports P5, P6, and
P15 are fed from supply voltage VDDPA
.
2,
VDDPB
-
PS/B Digital Pad Supply Voltage for Domain B
36,
38,
72,
74,
108,
110,
144
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The on-chip voltage regulators and all ports
except P5, P6, and P15 are fed from supply
voltage VDDPB
.
1,
VSS
-
PS/-- Digital Ground
37,
73,
109
All VSS pins must be connected to the ground-line
or ground-plane.
1) To generate the reference clock output for bus timing measurement, fSYS must be selected as source for
EXTCLK and P2.8 must be selected as output pin. Also the high-speed clock pad must be enabled. This
configuration is referred to as reference clock output signal CLKOUT.
Data Sheet
33
V0.91, 2007-02
Draft Version
INFINEON [ Infineon ]
