TLE9879QXA40
High-Speed Synchronous Serial Interface (SSC1/SSC2)
21
High-Speed Synchronous Serial Interface (SSC1/SSC2)
21.1
Features
•
Master and Slave Mode operation
– Full-duplex or half-duplex operation
•
•
Transmit and receive buffered
Flexible data format
– Programmable number of data bits: 2 to 16 bits
– Programmable shift direction: Least Significant Bit (LSB) or Most Significant Bit (MSB) shift first
– Programmable clock polarity: idle low or high state for the shift clock
– Programmable clock/data phase: data shift with leading or trailing edge of the shift clock
Variable baud rate
•
•
•
Compatible with Serial Peripheral Interface (SPI)
Interrupt generation
– On a transmitter empty condition
– On a “receiver full” condition
– On an error condition (receive, phase, baud rate, transmission error)
Data Sheet
64
Rev. 1.0, 2015-04-30
INFINEON [ Infineon ]
