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TDA5235 参数 Datasheet PDF下载

TDA5235图片预览
型号: TDA5235
PDF下载: 下载PDF文件 查看货源
内容描述: 增强灵敏度双配置接收器,具有数字基带处理 [Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing]
分类和应用:
文件页数/大小: 259 页 / 6799 K
品牌: INFINEON [ Infineon ]
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TDA5235  
Functional Description  
encoded data (chips). Basically the Framer consists of two identical correlators of 16  
chips in length. It allows a Telegram Start Identifier (TSI) to be composed of Bi-phase  
encoded “Zeros” and “Ones”. The active length of each of the 16 chips correlators is  
defined independently in the x_TSILENA and x_TSILENB registers. The pattern to  
match is defined as a sequence of chips in the x_TSIPTA0, x_TSIPTA1, x_TSIPTB0 and  
x_TSIPTB1 registers.  
Note that the RUNIN length shown in the figures below is the maximum needed RUNIN  
with the length of 8 chips. Further details on the needed RUNIN time of the receiver can  
be seen in Chapter 2.4.8.3 Clock and Data Recovery.  
Bi-phase- /  
Data  
Manchester -  
Decoder  
Data  
Data Clock  
CV  
Data Clock  
EOMCV  
EOMSYLO  
EOMDATLEN  
Code-Violation  
Detector  
EOM-Detector  
EOM  
x_EOMDLEN  
x_EOMDLENP  
Sync  
FSync  
TSI wild card  
x_TSIMODE(6:3)  
Delay-Line 16-bit  
Chip-Data Clock  
Chip-Data  
from CR  
from  
Data-  
Slicer  
MRB  
LRB  
x_TSILENA  
Correlator A  
Controller  
Correlator A 16-bit  
MSB LSB  
CorrAMatch  
Frame  
Synchron-  
ization  
TSI Data-Pattern  
TSI Data-Pattern  
LSB  
MSB  
Controller  
x_TSIMODE  
x_TSIGAP  
Delay-Line 16-bit  
Correlator B 16-bit  
MUX  
MRB  
LRB  
Correlator B  
Controller  
x_TSILENB  
TSI Data-Pattern  
TSI Data-Pattern  
LSB  
MSB LSB  
MSB  
Figure 26  
Frame Synchronization Unit  
Data Sheet  
56  
V1.0, 2010-02-19  
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