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TDA5235 参数 Datasheet PDF下载

TDA5235图片预览
型号: TDA5235
PDF下载: 下载PDF文件 查看货源
内容描述: 增强灵敏度双配置接收器,具有数字基带处理 [Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing]
分类和应用:
文件页数/大小: 259 页 / 6799 K
品牌: INFINEON [ Infineon ]
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TDA5235  
Functional Description  
Wake-Up on Signal Recognition  
Instead of the previously mentioned RSSI criterion, the Signal Recognition criterion (see  
Chapter 2.4.8.1) can be applied for Wake-Up search. So the x_SIGDET1, x_SIGDETLO  
and x_NDTHRES threshold registers can be used.  
The observation time has to be specified in the register x_WULOT. This observation time  
has to contain the delay in the signal path (12.5 µs + 2.25*Tbit) and the duration for the  
comparison of the Signal Recognition criterion.  
The number of consecutive valid Signal Recognition samples/levels is compared vs. a  
threshold defined in x_WURSSIBH1 register. Please note that x_WURSSIBH1 register  
is used for both Wake-Up on RSSI and Wake-Up on Signal Recognition function. This  
threshold has an influence on the false alarm rate. So x_WURSSIBH1 defines the  
minimum needed consecutive T/16 samples of the Signal Recognition output to be at  
high level for a positive Wake-Up event generation.  
Wake-Up on Data Criterion  
All SFRs configuring the Wake-up Generation Unit support the Multi-Configuration  
capability. The search for a wake-up data criterion is started if symbol synchronization is  
given within a certain duration (see Chapter 2.4.8.8 RUNIN, Synchronization Search  
Time and Inter-Frame Time); otherwise the wake-up search is aborted. During the  
observation period, the wake-up data search is aborted immediately if symbol  
synchronization is lost. If this is not the case, the wake-up search will last for the number  
of chips/bits defined in the register x_WUBCNT.  
The Wake-up Window (WUW) Chip/Bit Counter counts the number of received chips/bits  
and compares this number vs. the number of chips/bits defined in the register  
x_WUBCNT.  
The Code Violation Detector checks the incoming chip data stream for being Bi-Phase  
coded. A Code Violation is given if three consecutive chips are ’One’ or ’Zero’.  
The Bit Change Detector checks the incoming Bi-phase coded bit data stream for  
changes from 'Zero' to 'One' or 'One' to 'Zero'.  
The Pattern Detector searches for a pattern with 16 chips/bits length within the Wake-up  
Window. The pattern is configurable via the registers x_WUPAT0 and x_WUPAT1.  
On using Data Slicer Bit Mode, the Wake-up criteria Equal Bits Detection and Pattern  
Detection cannot be applied. Further details can be seen at the end of Chapter 2.4.8.4.  
The selection of 1 out of 4 wake-up data criteria is done via the x_WUC register.  
Data Sheet  
53  
V1.0, 2010-02-19  
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