TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-10 Port 20 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
K25
P20.11
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 7 of TIM module 3
Mux input channel 7 of TIM module 2
Slave SPI clock inputs
read data in
GTM_TIM3_IN7_6
GTM_TIM2_IN7_6
QSPI0_SCLKA
SDMMC0_DAT3_IN
P20.11
O0
O1
O2
O3
O4
O5
O6
O7
General-purpose output
GTM muxed output
Reserved
GTM_TOUT67
—
QSPI0_SCLK
—
Master SPI clock output
Reserved
—
Reserved
—
Reserved
CCU61_COUT60
IOM_MON1_11
IOM_REF1_10
SDMMC0_DAT3
P20.12
T12 PWM channel 60
Monitor input 1
Reference input 1
write data out
O
I
J24
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 0 of TIM module 3
Mux input channel 0 of TIM module 2
Master SPI data input
read data in
GTM_TIM3_IN0_5
GTM_TIM2_IN0_5
QSPI0_MRSTA
SDMMC0_DAT4_IN
IOM_PIN_13
P20.12
GPIO pad input to FPC
General-purpose output
GTM muxed output
Monitor input 0
O0
O1
GTM_TOUT68
IOM_MON0_13
—
O2
O3
Reserved
QSPI0_MRST
IOM_MON2_0
IOM_REF2_0
QSPI0_MTSR
—
Slave SPI data output
Monitor input 2
Reference input 2
Master SPI data output
Reserved
O4
O5
O6
O7
—
Reserved
CCU61_COUT61
IOM_MON1_12
IOM_REF1_9
SDMMC0_DAT4
T12 PWM channel 61
Monitor input 1
Reference input 1
write data out
O
Data Sheet
93
V 1.2, 2021-03
OPEN MARKET VERSION