TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-3 Port 02 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
G1
P02.15
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
GTM_TIM5_IN1_3
GTM_TIM4_IN1_3
GTM_TIM2_IN5_14
EDSADC_DSCIN13A
EDSADC_ITR13E
P02.15
Mux input channel 1 of TIM module 5
Mux input channel 1 of TIM module 4
Mux input channel 5 of TIM module 2
Modulator clock input, channel 13
Trigger/Gate input, channel 13
General-purpose output
GTM muxed output
O0
O1
O2
O3
O4
O5
O6
GTM_TOUT152
QSPI3_SLSO6
QSPI4_SLSO5
ASCLIN6_ATX
—
Master slave select output
Master slave select output
Transmit output
Reserved
ERAY1_TXENB
Transmit Enable Channel B
Modulator clock output
EDSADC_DSCOUT13 O7
Table 2-4 Port 10 Functions
Ball
Symbol
Ctrl. Buffer
Type
Function
F12
P10.0
I
SLOW /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 0 of TIM module 4
Mux input channel 4 of TIM module 1
Mux input channel 4 of TIM module 0
Count direction control input of core timer T6
Receive input
GTM_TIM4_IN0_12
GTM_TIM1_IN4_2
GTM_TIM0_IN4_2
GPT120_T6EUDB
ASCLIN11_ARXA
GETH_RXERC
GTM_DTMA5_2
P10.0
Receive Error MII
CDTM5_DTM4
O0
O1
O2
O3
O4
O5
O6
O7
General-purpose output
GTM muxed output
GTM_TOUT102
ASCLIN11_ATX
QSPI1_SLSO10
—
Transmit output
Master slave select output
Reserved
EVADC_FC6BFLOUT
—
Boundary flag output, FC channel 6
Reserved
—
Reserved
Data Sheet
48
V 1.2, 2021-03
OPEN MARKET VERSION