TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-2 Port 01 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
M9
P01.4
I
SLOW /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 6 of TIM module 4
Mux input channel 1 of TIM module 2
Mux input channel 6 of TIM module 0
CAN receive input node 1
Trigger/Gate input, channel 7
Analog input channel 13, group 9
General-purpose output
GTM muxed output
GTM_TIM4_IN6_2
GTM_TIM2_IN1_14
GTM_TIM0_IN6_8
CAN01_RXDC
EDSADC_ITR7E
EVADC_G9CH13
P01.4
AI
O0
O1
O2
O3
O4
O5
O6
O7
I
GTM_TOUT112
—
Reserved
ASCLIN9_ASLSO
QSPI3_SLSO10
—
Slave select signal output
Master slave select output
Reserved
—
Reserved
—
Reserved
N10
P01.5
SLOW /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 3 of TIM module 5
Mux input channel 3 of TIM module 2
Mux input channel 2 of TIM module 2
Master SPI data input
Modulator clock input, channel 8
Receive input
GTM_TIM5_IN3_2
GTM_TIM2_IN3_7
GTM_TIM2_IN2_7
QSPI3_MRSTC
EDSADC_DSCIN8A
ASCLIN9_ARXA
EVADC_G9CH12
P01.5
AI
Analog input channel 12, group 9
General-purpose output
GTM muxed output
O0
O1
O2
O3
O4
GTM_TOUT113
—
Reserved
—
Reserved
QSPI3_MRST
IOM_MON2_3
IOM_REF2_3
—
Slave SPI data output
Monitor input 2
Reference input 2
O5
O6
O7
Reserved
EDSADC_DSCOUT8
—
Modulator clock output
Reserved
Data Sheet
30
V 1.2, 2021-03
OPEN MARKET VERSION