TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-2 Port 01 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
N2
P01.12
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 0 of TIM module 6
Mux input channel 0 of TIM module 5
Mux input channel 0 of TIM module 4
Digital datastream input, channel 10
Trigger/Gate input, channel 10
General-purpose output
GTM muxed output
GTM_TIM6_IN0_3
GTM_TIM5_IN0_2
GTM_TIM4_IN0_2
EDSADC_DSDIN10A
EDSADC_ITR10F
P01.12
O0
O1
O2
O3
O4
O5
O6
O7
I
GTM_TOUT158
ASCLIN7_ATX
—
Transmit output
Reserved
—
Reserved
—
Reserved
ERAY1_TXDA
—
Transmit Channel A
Reserved
N1
P01.13
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 1 of TIM module 6
Mux input channel 3 of TIM module 5
Mux input channel 3 of TIM module 4
Modulator clock input, channel 10
Trigger/Gate input, channel 10
General-purpose output
GTM muxed output
GTM_TIM6_IN1_3
GTM_TIM5_IN3_1
GTM_TIM4_IN3_1
EDSADC_DSCIN10A
EDSADC_ITR10E
P01.13
O0
O1
O2
GTM_TOUT161
ASCLIN0_ATX
IOM_MON2_12
IOM_REF2_12
—
Transmit output
Monitor input 2
Reference input 2
O3
O4
Reserved
CAN00_TXD
IOM_MON2_5
IOM_REF2_5
CAN20_TXD
ERAY1_TXDB
CAN transmit output node 0
Monitor input 2
Reference input 2
O5
O6
CAN transmit output node 0
Transmit Channel B
EDSADC_DSCOUT10 O7
Modulator clock output
Data Sheet
34
V 1.2, 2021-03
OPEN MARKET VERSION