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SAK-TC399XP-256F300S BC 参数 Datasheet PDF下载

SAK-TC399XP-256F300S BC图片预览
型号: SAK-TC399XP-256F300S BC
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内容描述: [Infineon releases its second generation AURIX microcontroller in embedded flash 40 nm technology. It comes back with an increase in performance, memory sizes, connectivity and more scalability to address the new automotive trends and challenges. This family has more than 20 products to provide the most scalable portfolio of safety microcontrol­ler. In terms of performance, the highest end product TC39x offers 6 cores running at 300 MHz and up to 6.9 MBytes embedded RAM, and consuming below 2 W. ]
分类和应用:
文件页数/大小: 548 页 / 21256 K
品牌: INFINEON [ Infineon ]
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TC39x BC/BD-Step  
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration  
Table 2-1 Port 00 Functions (cont’d)  
Ball  
Symbol  
Ctrl. Buffer  
Type  
Function  
T7  
P00.12  
I
SLOW /  
PU1 /  
VEXT /  
ES1  
General-purpose input  
Mux input channel 3 of TIM module 4  
Mux input channel 3 of TIM module 1  
Mux input channel 3 of TIM module 0  
Clear to send input  
GTM_TIM4_IN3_11  
GTM_TIM1_IN3_1  
GTM_TIM0_IN3_1  
ASCLIN3_ACTSA  
EDSADC_DSDIN0A  
ASCLIN4_ARXA  
SENT_SENT11B  
EVADC_G9CH0  
EVADC_FC2CH0  
P00.12  
Digital datastream input, channel 0  
Receive input  
Receive input channel 11  
Analog input channel 0, group 9  
Analog input FC channel 2  
General-purpose output  
GTM muxed output  
AI  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
GTM_TOUT21  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
CCU61_COUT63  
IOM_MON1_7  
IOM_REF1_7  
P00.13  
T13 PWM channel 63  
Monitor input 1  
Reference input 1  
T2  
I
FAST /  
PU1 /  
VEXT /  
ES  
General-purpose input  
Mux input channel 5 of TIM module 6  
Mux input channel 0 of TIM module 5  
Mux input channel 0 of TIM module 4  
Digital datastream input, channel 6  
General-purpose output  
GTM muxed output  
GTM_TIM6_IN5_2  
GTM_TIM5_IN0_1  
GTM_TIM4_IN0_1  
EDSADC_DSDIN6A  
P00.13  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
GTM_TOUT167  
Reserved  
Reserved  
CCU_EXTCLK1  
External Clock 1  
Reserved  
Reserved  
Reserved  
Data Sheet  
26  
V 1.2, 2021-03  
OPEN MARKET VERSION  
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