SAB 80C515/80C535
Note that PCON is not a bit-addressable register, so the above mentioned sequence for
entering the power-down mode is obtained by byte-handling instructions, as shown in the
following example:
ORL
ORL
PCON,#00000010
;Set bit PDE, bit PDS must not be set
;Set bit PDS, bit PDE must not be set
B
B
PCON,#01000000
The instruction that sets bit PDS is the last instruction executed before going into
power-down mode.
The only exit from power-down mode is a hardware reset. Reset will redefine all SFR's, but will
not change the contents of the internal RAM.
In the power-down mode of operation, V can be reduced to minimize power consumption. It
CC
must be ensured, however, that V is not reduced before the power- down mode is invoked,
CC
and that V
is restored to its normal operating level, before the power-down mode is
CC
terminated. The reset signal that terminates the power-down mode also restarts the oscillator.
The reset should not be activated before V is restored to its normal operating level and must
CC
be held active long enough to allow the oscillator to restart and stabilize (similar to power-on
reset).
Differences in Pin Assignments of the SAB 80C515 and SAB 80515
Since the SAB 80C515 is designed in CMOS technology, this device requires no V pin, be-
B B
cause the die's substrate is internally connected to V .
CC
Furthermore, the RAM backup power supply via pin V is replaced by the software- controlled
PD
power-down mode and power supply via V .
CC
Therefore, pins V
and V
of the NMOS version SAB 80515 are used for other functions in
PD
B B
the SAB 80C515.
Pin 4 (the former pin V ) is the new PE pin which enables the use of the power saving modes.
PD
Pin 37 (the former pin V ) becomes an additional V pin. Thus, it is possible to insert a
BB
CC
decoupling capacitor between pin 37 (V ) and pin 38 (V ) very close to the device, thereby
CC
SS
avoiding long wiring and reducing the voltage distortion resulting from high dynamic current
peaks.
There is a difference between the NMOS and CMOS version concerning the clock circuitry.
When the device is driven from an external source, pin XTAL2 must be driven by the clock
signal; pin XTAL1, however, must be left open in the SAB 80C515 (must be tied low in the
NMOS version). When using the oscillator with a crystal there is no difference in the circuitry.
Thus, due to its pin compatibility the SAB 80C515 normally substitutes any SAB 80515 without
redesign of the user’s printed circuit board, but the user has to take care that the two V pins
CC
are hardwired on-chip. In any case, it is recommended that power is supplied on both V pins
CC
of the SAB 80C515 to improve the power supply to the chip.
If the power saving modes are to be used, pin PE must be tied low, otherwise these modes are
disabled.
Semiconductor Group
34
INFINEON [ Infineon ]
