SAB 80C515/80C535
Compare
In the compare mode, the 16-bit values stored in the dedicated compare registers are
compared to the contents of the timer 2 registers. If the count value in the timer 2
registers matches one of the stored values, an appropriate output signal is generated and an
interrupt is requested. Two compare modes are provided:
Mode 0: Upon a match the output signal changes from low to high. It goes back to a low
level when timer 2 overflows.
Mode 1: The transition of the output signal can be determined by software.
A timer 2 overflow causes no output change
Figure 3
Block Diagram of Timer/Counter 2
Semiconductor Group
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