PEB 2091
PEF 2091
Functional Description
• the bit CIWU:SPU is set to ’0’ or
• a wake-up tone is detected on the U-interface
DCL is activated such that its first rising edge occurs with the beginning of the bit
following the C/I0 channel. After the clocks have been enabled this is indicated by the
PU code in the C/I0 channel.
For detailed operational description, see "State Machine in NT Modes", page 160 ff.
3.7
Clocks
Clock generation of the IEC-Q depends on the mode used. The following sections will
describe the properties of these clocks in each mode. For better understanding of the
clock scheme in the different applications the properties of the IOM®-2 clocks will also
be outlined.
Semiconductor Group
83
Data Sheet 01.99
INFINEON [ Infineon ]
