PEB 2091
PEF 2091
Functional Description
Table 10
U-Frame Structure
Framing 2B + D Overhead Bits (M1 – M6)
Quat
Positions
1 – 9
10 –
117
118s
118m
119s
119m
238
120s
239
120m
240
Bit
Positions
1 – 18
19 –
234
235
236
237
Super
Frame # Frame #
Basic
Sync
Word
2B + D
M1
M2
M3
M4
M5
1
M6
1
1
1
2
ISW
2B + D EOCa1 EOCa2 EOCa3
ACT/
ACT
SW
2B + D EOC
d/m
EOCi1 EOCi2
DEA /
PS1
1
FEBE
3
4
5
6
SW
SW
SW
SW
2B + D EOCi3 EOCi4 EOCi5
1/ PS2
CRC1 CRC2
2B + D EOCi6 EOCi7 EOCi8 1/ NTM CRC3 CRC4
2B + D EOCa1 EOCa2 EOCa3 1/ CSO
CRC5 CRC6
CRC7 CRC8
2B + D EOC
d/m
EOCi1 EOCi2
1
7
8
SW
SW
2B + D EOCi3 EOCi4 EOCi5
UOA /
SAI
CRC9 CRC10
2B + D EOCi6 EOCi7 EOCi8 AIB / NIB CRC11 CRC12
2,3…
LT to NT dir. >
/
< NT to LT dir.
– ISW
– SW
– CRC
– EOC
Inverted Synchronization Word (quat):
Synchronization Word (quat):
Cyclic Redundancy Check
– 3 – 3 + 3 + 3 + 3 – 3 + 3 – 3 – 3
+ 3 + 3 – 3 – 3 – 3 + 3 – 3 + 3 + 3
Embedded Operation Channel
a
= address bit
d/m = data / message bit
= information (data / message)
i
– ACT
– DEA
– CSO
– UOA
– SAI
Activation bit
ACT = (1) –> Layer 2 ready for communication
DEA = (0) –> LT informs NT that it will turn off
CSO = (1) –> NT activation with cold start only
UOA = (0) –> U-only activated
SAI = (0) –> S-interface is deactivated
FEBE = (0) –> Far-end block error occurred
PS1 = (1) –> Primary power supply ok
PS2 = (1) –> Secondary power supply ok
NTM = (0) –> NT busy in test mode
AIB = (0) –> Interruption (according to ANSI)
NIB = (1) –> no function
Deactivation bit
Cold Start Only
U-Only Activation
S-Activity Indicator
– FEBE Far-end Block Error
– PS1
– PS2
– NTM
– AIB
– NIB
Power Status Primary Source
Power Status Secondary Source
NT Test Mode
Alarm Indication Bit
Network Indication Bit
(reserved for network use)
Semiconductor Group
68
Data Sheet 01.99
INFINEON [ Infineon ]
