PEB 2091
PEF 2091
Functional Description
3.5
U-Interface
The IEC-Q interfaces with the metallic line through this block. Both are linked by an
external circuitry consisting of a transformer and a hybrid circuitry (refer to Figure 93,
page 250 for details).
3.5.1
Output and Input Signals
The output stage comes out of two identical buffers operating in differential mode. This
concept allows an output swing of 6.4 Vpp between the output pins AOUT and BOUT of
the IEC-Q. The nominal peak values of ± 3 correspond to a 3.2 Vpeak chip output and
2.5 Vpeak on the metallic line.
The input signal from the metallic line is detected on the differential inputs AIN and BIN.
The swing of the input signal measured must be below 4 Vpp.
3.5.2
U -Frame Structure
Transmission on the U-interface is performed at a rate of 80 kBaud. The code used is
reducing two binary informations to one quaternary symbol (2B1Q).
Data is grouped together into U-superframes of 12 ms each. The beginning of a new
superframe is marked with an inverted synchronization word (ISW). Each superframe
consists of eight basic frames which begin with a standard synchronization word (SW)
and contain 222 bits of information. The structure of one U-superframe is illustrated in
Figure 21, and 22. For a detailed description of one complete superframe see Table 10,
page 68.
ISW
1. Basic Frame SW
2. Basic Frame . . .
SW
8. Basic Frame
<---12 ms--->
Figure 21
U-Superframe Structure
(I) SW
12 × 2B + D
M1 – M6
(Inverted) Synch Word
18 Bit (9 Quat)
User Data
216 Bits (108 Quat)
Maintenance Data
6 Bits (3 Quat)
<---1,5 ms--->
Figure 22
U-Basic Frame Structure
Out of the 222 information bits 216 contain 2B + D user data, the remaining 6 bits are
used to transmit maintenance bits. Thus 48 maintenance bits are available per
U-superframe. They are used to transmit two EOC-messages (24 bit), 12 overhead bits
and one check sum (12 bit).
Semiconductor Group
67
Data Sheet 01.99
INFINEON [ Infineon ]
