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ICE3BR4765J 参数 Datasheet PDF下载

ICE3BR4765J图片预览
型号: ICE3BR4765J
PDF下载: 下载PDF文件 查看货源
内容描述: [CoolSET®-F3R]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管信息通信管理
文件页数/大小: 32 页 / 751 K
品牌: INFINEON [ Infineon ]
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CoolSET®-F3R  
ICE3BR4765J  
Functional Description  
Within the soft start period, the duty cycle is increasing  
from zero to maximum gradually (see Figure 12).  
3.5  
PWM Section  
In addition to Start-Up, Soft-Start is also activated at  
each restart attempt during Auto Restart.  
0.75  
PWM Section  
Oscillator  
VSoftS  
Duty Cycle  
max  
tSoft-Start  
VSOFTS32  
Clock  
Frequency  
Jitter  
VFB  
t
t
Soft Start  
Block  
FF1  
Q
4.0V  
Gate Driver  
&
S
R
Soft Start  
Comparator  
1
G8  
PWM  
G9  
VOUT  
Comparator  
Current  
Limiting  
VOUT  
CoolMOS®  
Gate  
tStart-Up  
t
Figure 14  
3.5.1  
PWM Section Block  
Figure 13 Start Up Phase  
Oscillator  
The Start-Up time tStart-Up before the converter output  
voltage VOUT is settled, must be shorter than the Soft-  
Start Phase tSoft-Start (see Figure 13).  
The oscillator generates a fixed frequency of 65KHz  
with frequency jittering of ±4% (which is ±2.6KHz) at a  
jittering period of 4ms.  
By means of Soft-Start there is an effective  
minimization of current and voltage stresses on the  
integrated CoolMOS®, the clamp circuit and the output  
overshoot and it helps to prevent saturation of the  
transformer during Start-Up.  
A capacitor, a current source and current sink which  
determine the frequency are integrated. In order to  
achieve  
a very accurate switching frequency, the  
charging and discharging current of the implemented  
oscillator capacitor are internally trimmed. The ratio of  
controlled charge to discharge current is adjusted to  
reach a maximum duty cycle limitation of Dmax=0.75.  
Once the Soft Start period is over and when the IC goes  
into normal operating mode, the switching frequency of  
the clock is varied by the control signal from the Soft  
Start block. Then the switching frequency is varied in  
range of 65KHz ± 2.6KHz at period of 4ms.  
3.5.2  
PWM-Latch FF1  
The output of the oscillator block provides continuous  
pulse to the PWM-Latch which turns on/off the  
integrated CoolMOS®. After the PWM-Latch is set, it is  
reset by the PWM comparator, the Soft Start  
comparator or the Current -Limit comparator. When it is  
in reset mode, the output of the driver is shut down  
immediately.  
Version 2.5  
12  
19 Nov 2012  
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