AN985B/BX
Registers and Descriptors Description
Collision test: Always 0 because collision signal is not implemented.
Register 1
Status
R1
Offset
1H
Reset Value
7849H
Register 1(Status)
ꢀꢁ
ꢀꢂ
ꢀꢃ
ꢀꢄ
ꢀꢀ
ꢀꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀ
ꢅ
ꢀꢁꢁ% ꢀꢁꢁ% ꢀꢁꢁ%
ꢀꢁꢁ% ꢀꢁꢁ%
7ꢃ)' 7ꢃ+'
ꢀꢁ)' ꢀꢁ+'
5HV
UR
0)36 $&
UR UR
5)
$$
UR
/6
-'
(&
UR
7ꢂ
)'
+'
UR
UR
UR
UR
UR
UR
UR
URꢊꢋOK
URꢊꢋOO URꢊꢋOK
Field
Bits
Type
Description
100BT4
15
ro
100 BASE T4
Not supported
100BFD
100BHD
10FD
14
13
12
11
ro
ro
ro
ro
100 BASE-X Full Duplex
0B
1B
, PHY is not 100BASE-X full duplex capable
, PHY is 100BASE-X full duplex capable
100BASE-X Half Duplex
0B
1B
, PHY is not 100BASE-X half duplex capable
, PHY is 100BASE-X half duplex capable
10 Mbit/s Full Duplex
0B
1B
, PHY is not 10 Mbit/s/s Full duplex capable
, PHY is 10 Mbit/s/s Full duplex capable
10HD
10 Mbit/s Half Duplex
0B
1B
, PHY is not 10 Mbit/s/s Half duplex capable
, PHY is 10 Mbit/s/s Half duplex capable
100BT2FD
100BT2HD
10
9
ro
ro
100BASE-T2 Full Duplex
Not supported
100BASE-T2 Half Duplex
Not supported
Res
MFPS
8:7
6
ro
ro
Reserved
MF Preamble Suppression
0B
, PHY cannot accept management frames with preamble
suppression
, PHY can accept management frames with preamble suppression
1B
AC
RF
5
4
ro
Autoneg Complete
0B
1B
, autoneg incomplete
, autoneg completed
ro, lh
Remote Fault
Note:lh: Latch High
0B
1B
, no remote fault detected
, remote fault detected
Data Sheet
85
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
