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AN985BX 参数 Datasheet PDF下载

AN985BX图片预览
型号: AN985BX
PDF下载: 下载PDF文件 查看货源
内容描述: [LAN Controller, 1 Channel(s), 12.5MBps, CMOS, PQFP128, GREEN, PLASTIC, LQFP-128]
分类和应用: 时钟局域网数据传输PC外围集成电路
文件页数/大小: 112 页 / 4450 K
品牌: INFINEON [ Infineon ]
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AN985B/BX  
Pin Assignment Diagram  
5.1  
Pin Type and Buffer Type Abbreviations  
Standardized abbreviations:  
Table 1  
Abbreviations for Pin Type  
Abbreviations  
Description  
I
Standard input-only pin. Digital levels.  
O
Output. Digital levels.  
I/O  
AI  
I/O is a bidirectional input/output signal.  
Input. Analog levels.  
AO  
AI/O  
PWR  
GND  
MCL  
MCH  
NU  
NC  
Output. Analog levels.  
Input or Output. Analog levels.  
Power  
Ground  
Must be connected to Low (JEDEC Standard)  
Must be connected to High (JEDEC Standard)  
Not Usable (JEDEC Standard)  
Not Connected (JEDEC Standard)  
Table 2  
Abbreviations for Buffer Type  
Abbreviations  
Description  
Z
High impedance  
Pull up, 10 kΩ  
Pull down, 10 kΩ  
Pull down, 20 kΩ  
PU1  
PD1  
PD2  
TS  
Tristate capability: The corresponding pin has 3 operational states: Low, high and high-  
impedance.  
OD  
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and  
allows multiple devices to share as a wire-OR. An external pull-up is required to sustain the  
inactive state until another agent drives it, and must be provided by the central resource.  
OC  
PP  
Open Collector  
Push-Pull. The corresponding pin has 2 operational states: Active-low and active-high  
(identical to output with no type attribute).  
OD/PP  
Open-Drain or Push-Pull. The corresponding pin can be configured either as an output with  
the OD attribute or as an output with the PP attribute.  
ST  
TTL  
Schmitt-Trigger characteristics  
TTL characteristics  
Data Sheet  
12  
Rev. 1.51, 2005-11-30  
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