AN985B/BX
Pin Description
Table 3
Pin Definitions and Functions (cont’d)
Pin or Ball Name
No.
Pin
Buffer
Type
Function
Multiplexed Address Data Pin of CARDBUS Bus
Type
33
34
35
36
38
39
40
41
46
47
49
50
51
53
54
56
70
72
73
75
76
78
79
81
84
85
86
88
89
90
93
94
43
57
69
83
44
AD-31
AD-30
AD-29
AD-28
AD-27
AD-26
AD-25
AD-24
AD-23
AD-22
AD-21
AD-20
AD-19
AD-18
AD-17
AD-16
AD-15
AD-14
AD-13
AD-12
AD-11
AD-10
AD-9
I/O
AD-8
AD-7
AD-6
AD-5
AD-4
AD-3
AD-2
AD-1
AD-0
C-BEB3
C-BEB2
C-BEB1
C-BEB0
IDSEL
I/O
Bus Command and Byte Enable
I
Initialization Device Select
This signal is asserted when the host issues the
configuration cycles to the AN985B/BX.
59
FRAME#
I/O
Begin and Duration of Bus Access
Driven by master device
Data Sheet
14
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
