ICS2008B
Pin Descriptions
PIN NUMBER
TQFP PLCC
12, 10
11, 9
15
13
14
8
7
41
42
44
43
1
20
22
21
18
16
17
19
4
3
2
24, 23
27
30
25
26
40
38–31
39
5
6
29
28
18, 16
17, 15
PIN
NAME
Y1, Y2
C1, C2
TYPE
AI
AI
AI
AI
AI
AO
AO
AI
AI
AI
AI
AO
O
O
O
O
I
I
O
I
O
AI
I
I
I
I
I
I
I/O
O
P
P
P
P
DESC RIPTI ON
Video inputs from camera or other source. NOTE: This is also the Y
(Luma) input for S-VHS and HI-8 systems.
C (Chroma) inputs for S-VHS and HI-8 systems. In NTSC systems, this
pin should be tied to its respective Y input.
Data Threshold bypass input.
SYNC Threshold bypass input.
Clamp Threshold bypass input.
Video output. This is also the Y (Luma) output in S-Video mode.
C (Chroma) output for S-VHS and HI-8 systems.
Color Frame A/B input. This input is self biased (See Applications).
LTC SYNC input. This input is self biased (See Applications).
SMPTE LTC input+. This input is self biased (See Applications).
SMPTE LTC input–. This input is self biased (See Applications).
SMPTE LTC output
SMPTE LTC receive clock output.
SMPTE VITC output to video mixer circuit.
VITC gate indicates VITC code is being output for video overlay.
UART Transmit data
UART Receive data
Clear to Send
Ready to Send
14.318 MHz crystal input.
14.318 MHz crystal oscillator output.
Tie to +5 VDC
Address bus
Read Enable (active low)
Write Enable (active low)
SMPTE port chip select (active low)
UART chip select (active low)
Master reset (active high)
Bi-directional data bus
Interrupt Request (active high)
Analog V
DD
Analog Ground
Digital V
DD
Digital
21
DTHRESH
19
STHRESH
20
CTHRESH
14
Y OUT
13
C OUT
3
FRAME
4
CLICK
6
LTCIN+
5
LTCIN–
7
LTCOUT
26
LRCLK
28
VITCOUT
27
VITCGATE
24
TxD
22
RxD
23
CTS*
25
RTS*
10
XTAL1
9
XTAL2
8
LFC
30, 29 A1-A0
33
IOR*
36
IOW*
31
SMPTECS*
32
UARTCS*
2
RESET
44–37 D7-D0
1
INTR
11
AVDD
12
AVSS
35
VDD
34
VSS
TYPE:
A – Analog • P – Power • I – Input • O – Output
2008 2008B ICS2008
3
ICS2008B
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
