ICS1493-19
C
LOCK
G
ENERATOR FOR
A
UTOMOTIVE
A
PPLICATION
Parameter
Internal Pull-down Resistor
Symbol
R
Pd
Conditions
All clock outputs
except SSEN pin
SSEN pin
Min.
Typ.
200
100
Max.
Units
kΩ
kΩ
AC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±10%,
Ambient Temperature -40 to +85° C
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Output Rise Time
Output Fall Time
Output Rise Time
Output Fall Time
Output Clock Duty
Cycle
Symbol
f
IN
t
OR
t
OF
t
OR
t
OF
t
OR
t
OF
Conditions
20% to 80%, pins 15, C
L
=24 pF
80% to 20%, pins 15, C
L
=24 pF
20% to 80%, pins 21, C
L
=24 pF
80% to 20%, pins 21, C
L
=24 pF
20% to 80%, Pins 3, 6, 9, 12, 14,
and 19, C
L
=15 pF
80% to 20%, Pins 3, 6, 9, 12, 14,
and 19, C
L
=15 pF
at VDD/2, pins 15 and 21, C
L
=24
pF
at VDD/2, Pins 6, 9, 12, 14 and
19, C
L
=15 pF
at VDD/2, Pin 3, C
L
=15 pF
Min.
0.5
0.5
0.5
0.5
0.5
0.5
45
45
40
Typ.
19.35
0.9
0.9
1.0
1.0
0.9
0.9
50
50
50
Max. Units
MHz
1.25
1.25
1.5
1.5
1.25
1.25
55
55
60
175
1
1
20
ns
ns
ns
ns
ns
ns
%
%
%
ps
ms
ms
ms
kHz
ps
ps
ps
±250
±250
ps
ps
Output-to-Output Skew
Output Enable Time
Output Disable Time
Power-up Time
Spread Modulation
Jitter, Cycle-to-cycle
Jitter, Cycle-to-cycle
Jitter, Cycle-to-cycle
Jitter, Peak-to-peak
Jitter, Peak-to-peak
Pins 14, 15, and 21 only
OE going high to output valid
OE going low to output Invalid
Power on to output valid
Spread rate
CLK66 and CLK33, SSEN=1
All clocks except reference clock
19.35 MHz, SSEN=0
Reference clock 19.35 MHz
CLK66 and CLK33, SSEN=1
Peak-to-peak, all clocks except
reference clock 19.35 MHz,
SSEN=0
30
0
0
32
200
200
500
±150
±150
35
300
300
MDS 1493-19 J
6
Integrated Device Technology, Inc.
●
w w w. i d t . c o m
Revision 051310
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
