ICS1493-19
CLOCK GENERATOR FOR AUTOMOTIVE APPLICATION
External Components
Decoupling Capacitor
PCB Layout Recommendations
As with any high-performance mixed-signal IC, the
ICS1493-19 must be isolated from system power
supply noise to perform optimally.
Observe the following guidelines for optimum device
performance and lowest output phase noise:
1) The 0.01µF decoupling capacitors should be
mounted on the component side of the board as close
to the VDD pins as possible. No vias should be used
between the decoupling capacitors and VDD pins. The
PCB trace to VDD pin should be kept as short as
possible, as should the PCB trace to the ground via.
A decoupling capacitor of 0.01µF must be connected
between each VDD and the PCB ground plane.
Series Termination Resistor
Clock output traces should use series termination. To
series terminate a 50Ω trace (a commonly used trace
impedance), place a 33Ω resistor in series with the
clock line, as close to the clock output pin as possible.
The nominal impedance of the clock output is 20Ω.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces. Instead, they should be separated and away
from other traces.
Crystal Load Capacitors
3) Place the 33Ωseries termination resistor (if needed)
close to the clock output to minimize EMI.
The device crystal connections should include pads for
capacitors from X1 to ground and from X2 to ground.
These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the ICS1493-19. This includes signal traces
just underneath the device, or on layers adjacent to the
ground plane layer used by the device.
The value (in pF) of these crystal caps should equal
(C - 6 pF)*2. In this equation, C = crystal load
L
L
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 20
pF [(16-6) x 2 = 20 pF].
MDS 1493-19 J
4
Revision 051310
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