ICS1493-19
C
LOCK
G
ENERATOR FOR
A
UTOMOTIVE
A
PPLICATION
Pin
Number
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin
Name
GND66
GND33
VDD33
CLK33
/12.288
VDD66
CLK66
GNDPLL
VDDPLL
SSEN
OE
FSEL
VDDX
X2
Pin
Type
Power
Power
Power
Output
Power
Output
Power
Power
Input
Input
Input
Power
Input
Pin Description
Connect to 66.60 MHz clock output circuit ground.
Connect to 33.30 MHz clock output circuit ground.
Output driver power for 33.30 MHz clock output.
33.30 /12.288 MHz clock output. Internal weak pull-down resistor.
Output driver power for 66.60 MHz clock output.
66.60 MHz clock output. Internal weak pull-down resistor.
Connect to PLL circuit ground.
VDD for PLL circuits Connect to 3.3 V.
Spread enable pin for 66.60 MHz clock. See table 1 above. Internal
pull-down resistor.
Enables output when =1 and disables (pulled low) when =0. See table
above 2. Internal pull-up resistor.
Frequency select pin, internal pull-up. See Table 3.
VDD for crystal oscillator circuit. Connect to 3.3.V.
Crystal connection. Connect to a 19.35 MHz fundamental crystal.
MDS 1493-19 J
3
Integrated Device Technology, Inc.
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Revision 051310
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
